1. Field of the Invention
This invention relates generally to radio frequency (“RF”) receivers and in particular to direct-conversion receivers with direct current (“DC”) offset correction.
2. Related Art
In today's society, telecommunications systems are evolving at a rapid pace in response to the demands of society for more wireless communication systems, higher performance entertainment medium transmissions (via airwave, wired or satellite based) and broadband access whether wired or wireless. This evolution typically involves improving the performance of the communication system receivers or transceivers (i.e., which includes a receiver) while at the same time simplifying their manufacture.
Integrated circuit (“IC”) technology has lead to numerous advances in receiver technology through both transistor scaling and layout by increasing the density of active circuits that may be integrated into a receiver. Additionally, there are numerous architectural approaches for designing the receivers. At present, the two most commonly utilized architectural approaches include superheterodyne receivers and direct-conversion receivers.
FIG. 1 shows a superheterodyne receiver 100, which is an architecture typically utilized in most telecommunication applications. It is therefore appreciated by those skilled in the art that superheterodyne receiver architectures are well known in the art. In FIG. 1, the superheterodyne receiver 100 may include a radio frequency (“RF”) section 102, mixer 104, intermediate frequency (“IF”) section 106, demodulator 108 and local oscillator (“LO”) 110. In operation, an input signal 112 is first amplified by the RF section 102 and then mixed down to an IF frequency by mixer 104 utilizing a frequency reference 114 produced by the LO 110. The mixed output 116 is then filtered and potentially amplified by the IF section 106 and demodulated by demodulator 108 producing a baseband signal 118.
Direct-conversion receivers (also generally known as “homodyne” receivers) differ from superheterodyne receivers by eliminating the IF section 106 and are therefore typically known as “zero-frequency” receivers. A direct-conversion receiver operates by performing a direct conversion on a received RF signal producing a baseband signal. The direct-conversion receiver utilizes a mixer that mixes the received RF signal with a frequency signal produced by a LO operating at a frequency that is approximately equal to the RF frequency.
In FIG. 2, an example implementation of a direct-conversion receiver front-end 200 is shown. An input RF signal 202 is received by an amplifier 204 (such as a low-noise amplifier generally known as a “LNA”). The amplifier 204 amplifies the input RF signal 202 to produce an amplified signal 206 that is input into two mixers 208 and 210. The mixers 208 and 210 then mix the amplified signal 206 with a reference signal 212 and phase-shifted signal 214 produced by a local oscillator 216 and quadrature (i.e., 90 degrees) phase-shifter 218. The reference signal 212 has a frequency that is approximately centered at the channel frequency of the received input RF signal 202. A quadrature phase-shifter 218 produces the phase-shifted signal 214 by phase shifting the reference signal 212 by approximately 90 degrees.
The mixer 208 produces in-phase (“I-channel”) output signal 220 and mixer 210 produces quadrature-phase (“Q-channel”) output signal 222. The in-phase output signal 220 is then filtered with a low-pass filter (“LPF”) 224 to produce the in-phase output signal 226. Similarly, the quadrature-phase output signal 222 is filtered with LPF 228 to produce the quadrature-phase output signal 230.
Unfortunately, direct-conversion receivers have a number of problems that include spurious LO leakage, distortion and direct current (“DC”) offset. Of these problems, typically the DC offset is the most serious because the DC offset may appear in the middle of the down-converted signal spectrum and may be larger than the received signal itself. Additionally, the DC offset is typically larger than the thermal and flicker noise. The DC offset is unavoidable because it is caused by the transistor level amplifiers and filters due to mismatches in the signal path and spurious LO leakage.
Spurious LO leakage in a direct-conversion receiver is typically caused by the LO 216 being tuned to approximately the center frequency of the received RF signal 202. As a result, some LO energy may make its way back through the mixers 208 and 210 and amplifier 204, and travel out via the signal path of the received RF signal 202 (potentially an antenna or transmission line). This LO energy may then become an in-band interferer with other receivers (not shown) that are tuned to the same frequency.
If LO energy is reflected back from the signal path of the received RF signal 202 (as shown in reflected LO energy paths 232 and 234), the LO energy will again enter the mixers 208 and 210 and self-down-convert to produce DC output signals (not shown) at the output of the mixers 208 and 210 and input to the baseband section of the direct-conversion receiver. This LO leakage may result in a large DC offset because of self-mixing. The LO leakage may often be in the order of several tens of millivolts at the input of the baseband section. This may drive any active components within the baseband section out of their dynamic range causing distortion to the desired baseband signals. As a result, it is typically difficult to achieve high performance in integrated direct-conversion receivers because of the effects of the DC offset problem.
As an example, a typical high-performance satellite receiver may have a large gain in the range of approximately 40 to 70 decibels (“dB”) within its baseband section. Such a large gain in the baseband typically amplifies any received DC offsets and intrinsic circuit DC offsets to a signal level that may saturate the baseband circuitry in the satellite receiver. The saturated circuitry may resultantly generate harmonics and inter-modulation tones that would unfortunately increase the implementation loss of the satellite receiver. Therefore, in order to improve the performance of direct-conversion receivers, there is a need for a system and method capable of correcting for the DC offset produced in direct-conversion receivers.
An attempted solution in the past included removing the DC offset by capacitive coupling (also known as alternating current “AC” coupling) the baseband
An attempted solution in the past included removing the DC offset by capacitive coupling (also known as alternating current “AC” coupling) the baseband section of the direct-conversion receiver. This approach typically introduces AC coupling in the down-converted signal path to build a high-pass filtering section to block the DC offset and usually requires a large external capacitor to produce a low high-pass corner frequency for negligible signal loss. Unfortunately, large capacitors may lower the response time of the direct-conversion receiver. Additionally, large capacitors in a direct-conversion receiver would make implementing the direct-conversion receiver within a monolithic IC difficult because typically large capacitors consume correspondingly large areas of the IC.
The input impedance of the baseband section may determine the corner frequency but usually large variations of the input impedance may also make it difficult to control the value of the corner frequency. Furthermore, the DC offset in the baseband section, after AC coupling, is not eliminated and this typically limits the total allowable gain allocated to the analog baseband section. Additionally, multiple AC couplings in the baseband section may reduce the robustness of receiver system design.
An attempted solution to the problems associated with the AC coupling approach is shown in FIG. 3. In FIG. 3, a DC offset correction servo-loop 300 is shown with a negative feedback loop that loops around the baseband section 302 where the feedback loop may include a resistive and capacitive (“RC”) integrator 304. The baseband section 302 may include a LPF 306 and a low-noise variable-gain amplifier 308 (“LN-VGA”). The integrator 304 may include an amplifier 310 (such as an operational amplifier “Op Amp”) with a pair of capacitors (each of value “C”) 312 and 314 and a pair of resistors (each of value “R”) 316 and 318 configured as an integrator.
As an example of operation, if the baseband section 302 has a forward gain of Aff, the resulting high-pass transfer function for the DC offset correction loop 300 would be defined by the following relationship:
                    V        o                    V        i              =                  A        ff            ⁢              s                  s          +                                    A              ff                        RC                                ,where Vi is the input voltage 320 of the baseband section 302, Vo is the output voltage of the baseband section 302, and “s” is the well-known Laplace transform operator, which is equal to σ+jω. Additionally, the 3 dB high-pass corner frequency for the DC offset correction loop 300 would be defined by the following relationship:
      f          3      ⁢      db_hp        =                    A        ff                    2        ⁢        π        ⁢                                  ⁢        RC              .  
Unfortunately, while this approach does help compensate for DC offset in a direct-conversion receiver in some situations, it does so by typically requiring higher resistor R and capacitor C values for low corner frequencies because of the effects of the forward gain Aff. As a result, large external resistors and capacitors are usually required which in turn increases the overall direct-conversion receiver cost. Additionally, the DC offset resulting from the feedback path impairment typically will be amplified by the forward gain Aff to the point of potentially causing the feedback correction to fail.
Therefore, there is a need for a system and method that improves upon the performance of currently known direct-conversion receivers by correcting for DC offset.